High-performance computing plays a critical role in science, industry, and innovation. While Europe operates some of the world’s most powerful supercomputers, maintaining long-term technological sovereignty requires more than access to computing resources: it also depends on the ability to develop and integrate key technologies within Europe itself.
This is the ambition behind EUPEX (European Pilot for Exascale), a project funded by the EuroHPC Joint Undertaking. Rather than developing a single technology, EUPEX brings together a wide range of European hardware and software components within a common platform to assess their readiness for future HPC systems. The project serves as a bridge between technology development and large-scale deployment, providing a realistic environment in which new European solutions can be integrated, evaluated, and improved.
The consortium brings together 17 partners from across Europe, including supercomputing centres, research organisations, universities, and technology companies. Coordinated by Bull, the project combines expertise in system architecture, software, application optimisation, and HPC operations. Together, the partners are working to demonstrate how European technologies can be assembled into a coherent HPC platform capable of supporting real scientific workloads.
A key aspect of EUPEX is its co-design approach. Alongside system integration activities, the project has worked closely with application teams to prepare scientific codes, evaluate software components and study the behaviour of representative HPC workloads on emerging European technologies. This enables both users and technology providers to gain valuable feedback before these technologies are deployed in future production systems.
3D image of the Rhea1 chip made by SiPearl
EUPEX also builds on the results of earlier European initiatives. In particular, the European Processor Initiative (EPI) laid the foundations for a European HPC processor architecture, which is now being industrialised by SiPearl through its Rhea family of processors. Building on this work, EUPEX aims to integrate the Rhea processor into a pilot platform representative of future European HPC systems. In doing so, the project helps bridge the gap between processor development and large-scale deployment, demonstrating how European technologies can be brought together across the full HPC value chain – from chip design to system integration and application readiness.
A European processor becomes reality
EUPEX has recently reached one of its most significant milestones with the arrival of the first SiPearl Rhea1 processor samples, marking a major step forward for the European HPC ecosystem. Developed from the processor architecture defined within the European Processor Initiative (EPI) and industrialised by SiPearl, Rhea1 represents the most complex server-class CPU ever designed in Europe. It is also the first European processor specifically targeting both high-performance computing and AI workloads while integrating advanced technologies such as High-Bandwidth Memory (HBM).
Following the successful tape-out and manufacturing phases, the first silicon samples are now being evaluated. Within EUPEX, these early processors are playing a crucial role in the next stage of the project. They are being used to validate the hardware platform and support the development and integration of the system boards and compute blades that will form the foundation of the EUPEX pilot platform. The project therefore serves as a critical bridge between processor design and deployment at system scale.
Hosted at CEA-TGCC © CEA P. Stroppa
Beyond the technical achievement, the significance for Europe is considerable. For the first time, a processor designed in Europe is progressing towards deployment in a production-class supercomputing environment. The technologies being integrated and validated within EUPEX are expected to be reused in JUPITER, Europe’s first Exascale supercomputer. This makes EUPEX much more than a technology demonstrator: it is a key step in turning European processor innovation into operational HPC infrastructure and strengthening Europe’s ability to build its own end-to-end computing ecosystem.
Preparing applications for Europe’s future HPC/AI systems: An interview with Matteo Turisini
Matteo Turisini is a scientist and technologist at CINECA, providing technical leadership across several EuroHPC projects. In EUPEX, he coordinates international application teams and interfaces with software and hardware teams. Previously, he worked as an experimental nuclear physicist for over a decade at INFN, CERN, and Jefferson Lab.
Why is preparing scientific applications from the outset for European technologies, such as Rhea1, strategic for Europe, and what challenges does this involve?
Preparing applications from the outset is essential because even the most advanced processor delivers value only when software can exploit its capabilities. Scientific codes developed and refined over decades cannot simply be transferred to a new platform: they must be analysed, adapted, and evolved without compromising their reliability or results.
My role has been to align application developers, hardware designers and software-tool developers, translating widely differing scientific requirements into shared technical priorities. This ensures that applications are not introduced only at the end as test cases, but help guide technical choices and reduce the risk of developing technologies that are difficult to use.
The main challenge has been the delayed availability of Rhea1. We therefore reorganised the work programme around intermediate Arm platforms based on A64FX and Grace Hopper. This allowed us to prepare the codes, compare optimisation strategies and validate methods designed to be transferable. Performance, scalability, and energy efficiency will still need to be confirmed on the final platform.
What are the most significant results achieved through the application work, and how do they contribute to Europe’s scientific, industrial, and societal priorities?
We coordinated eight applications spanning weather forecasting, agriculture, Earth observation, seismic risk, engineering, the search for new drugs, materials science and cosmology, while pursuing common objectives across very different scientific and technical requirements.
The work combined optimisation of the most computationally demanding sections of the codes with the broader evolution of applications and their workflows, assigning each task to the most suitable computing resource.
In ESPRESO-FEM, which is used to analyse structures, materials, vibrations and thermal phenomena, a key software component became up to 5.9 times faster. This enables more detailed models or a greater number of design variants using the same resources.
CybeleTech’s AgriTech workflow was reorganised to improve the analysis of wheat varieties that could adapt to future climate conditions across Europe. ECMWF developed a tool capable of automatically adapting parts of its weather forecasting code to different processors.
For seismic risk, we ran numerous simulations in parallel across Leonardo’s computing modules, laying the foundations for linking their results to estimates of building damage. These advances combine scientific research, industrial design, and tangible benefits for society.
What lessons have you learned from adapting such different applications to Arm-based processors?
Arm is a family of processor architectures designed to combine efficiency and flexibility. It is now used in almost every smartphone and has gradually expanded into servers and supercomputers, where performance and energy efficiency must go hand in hand.
This common foundation can, however, be implemented in very different processors. A64FX, NVIDIA Grace, and SiPearl Rhea1 differ in how they perform calculations in parallel and transfer data between memory and the processor. The same code can therefore run on all these processors with different levels of efficiency.
No single optimisation technique works for every application. Some codes benefit from applying the same operation to large amounts of data; others benefit from GPUs, improved memory access or reduced communication overhead. Before making changes, it is necessary to understand where the application spends its time and computing resources.
In scientific computing, there is an understandable tendency not to modify code that works. But if modernisation is postponed for too long, it becomes an emergency and reliable software can turn into a barrier to innovation. Modernising does not mean rewriting everything: it means protecting the long-term investment embodied in the software by managing a gradual transition that makes it more modular, maintainable, and ready for future technologies.
Beyond functional portability, what is needed to understand application behaviour and fully exploit a new HPC architecture?
It is not enough for an application simply to run: to determine whether it is using a new system effectively, we need to measure its behaviour. We must assess how much energy it consumes, how efficiently it uses processors and accelerators, and how communication and data movement affect execution time.
This requires monitoring and performance-analysis tools – the software equivalent of a diagnostic examination. The coordinated suite of tools developed and integrated within EUPEX enables us to analyse performance and energy consumption, identify bottlenecks, manage data movement, and verify whether an intervention delivers a genuine improvement.
The project also contributes by linking these tools to different applications and platforms, turning the measurements collected into evidence that can guide priorities and technical decisions. For those coordinating a complex programme, this is essential: it makes it possible to distinguish application-specific problems from more general architectural limitations and to focus efforts on the changes with the greatest impact. This is how a pilot project helps bridge the gap between making a technology available and using it effectively within Europe’s future HPC infrastructure.
Building a European software stack
The EUPEX Software Stack brings together a set of software components designed to help both users and system administrators get the most out of future European exascale systems. It covers the full software environment, from system operation to application execution and performance optimisation.
EUPEX software stack overview
The stack is organised around four main pillars. System Management provides the services needed to deploy, monitor, and manage the platform. The Execution Environment supports the execution of HPC and AI workloads across heterogeneous resources. Efficiency Tools give users and developers access to profiling, monitoring, and optimisation capabilities to improve application performance and resource usage. Finally, Focus on I/O addresses storage and data movement challenges, helping applications efficiently handle large volumes of data.
Together, these four pillars form a coherent software ecosystem that supports both day-to-day system operations and the execution of demanding scientific and AI applications on next-generation European supercomputers.
Engaging the HPC & IA community
As EUPEX enters its final phase, dissemination and community engagement are becoming central, with a strong focus on the EUPEX Software Stack. The project aims not only to deliver a pilot system, but also to share its results, tools, and experience with the European HPC community.
Beyond platform access, EUPEX places strong emphasis on sharing lessons learned. While some hardware objectives have evolved, the project has delivered substantial results on the software and application side, including ARM porting, co-design activities, and the development of tools for system administration, performance optimisation, and workflow management. These efforts help prepare the HPC community for future European systems.
EUPEX also engages with the community through workshops and tutorials at major European HPC conferences such as ISC and Euro-Par, one of the leading scientific conferences in parallel and distributed computing.
At the SBAC-PAD Conference, taking place in Madrid on 14 October, EUPEX will host a dedicated workshop on the EUPEX Software Stack. This session will bring together presentations, posters, and technical discussions to provide a comprehensive overview of the stack’s architecture, key components, and current capabilities. It will highlight concrete results from the project, including software developments and co-design activities, while offering participants the opportunity to interact directly with developers and explore potential use cases within the European HPC ecosystem.
This project has received funding from the European High-Performance Computing Joint Undertaking (JU) under grant agreement No 101033975. The JU receives support from the European Union’s Horizon 2020 research and innovation programme and France, Germany, Italy, Greece, United Kingdom, Czech Republic, Croatia.
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